The present invention relates to a method of depositing films of nickel having low electrical resistance. The present invention has particular applicability to manufacturing semiconductor devices, e.g., high-density integrated circuit (xe2x80x9cICxe2x80x9d) semiconductor devices exhibiting reliable, high quality, adherent, low resistance, well-aligned contacts to source, drain, and gate regions of active devices, such as MOS and CMOS transistors formed in or on a semiconductor substrate. More specifically, the present invention relates to methods of utilizing refractory metal silicide processing methodology to manufacture semiconductor devices having nickel silicide contacts.
Fabrication of a semiconductor device and an integrated circuit thereof begins with a semiconductor substrate and employs film formation, ion implantation, photolithographic, etching and deposition techniques to form various structural features in or on a semiconductor substrate to attain individual circuit components which are then interconnected to ultimately form an integrated semiconductor device. Escalating requirements for high densification and performance associated with ultra large-scale integration (ULSI) semiconductor devices requires smaller design features, increased transistor and circuit speeds, high reliability and increased manufacturing throughput for competitiveness.
As device dimensions and feature size decrease to the deep sub-micron range, performance difficulties escalate, particularly those caused by an increase in the sheet resistance of the contact areas to the source and drain regions and junction leakage as junction layer thickness decreases. To ameliorate the higher electrical resistance caused by shrinking features, the use of self-aligned, highly electrically conductive refractory metal silicides, i.e., xe2x80x9csalicidesxe2x80x9d (derived from Self-ALIgned-siliCIDE), has become commonplace in the manufacture of IC semiconductor devices, as for example in the manufacture of MOS type transistors.
Salicide technology comprises forming metal silicide layers on the source/drain regions and/or on the gate electrode of a semiconductor device in a self-aligned manner. A conventional approach to reduce resistivity involves forming a multi-layered structure comprising a low resistance refractory metal silicide layer on a doped polycrystalline silicon, typically referred to as a polycide. Salicide technology reduces parasitic sheet and contact resistance in the source and drain diffusion layers and the gate electrode that results from scaling down the source and drain junctions and polycrystalline silicon line width.
Refractory metals commonly employed in salicide processing include platinum (Pt), titanium (Ti), and cobalt (Co), each of which forms very low resistivity phases with Si, e.g., PtSi2, TiSi2, and CoSi2. In practice, the refractory metal is deposited at a uniform thickness over all exposed surface features of a Si wafer, preferably by means of physical vapor deposition (xe2x80x9cPVDxe2x80x9d) process, e.g., sputtering from a target utilizing an ultra-high vacuum, multi-chamber DC magnetron or RF sputtering system. Such PVD tools arc commercially available, as for example by Applied Materials, Inc, of Santa Clara, Calif.; and by MRC of Gilbert, Arizona.
Recently, attention has turned towards nickel (Ni) to form nickel silicide utilizing salicide technology. Although the use of Ni in salicide technology has certain advantages over using Ti or Co, there are problems associated with Ni, particularly with the deposition of consistent films of nickel having a low electrical resistance from wafer to wafer. For example, PVD processes used in depositing metal layers are known to have a xe2x80x9cfirst wafer effectxe2x80x9d i.e. the physical, chemical and electrical properties of the deposited metal is inconsistent between the first several processed wafers and thus fail to meet acceptable device requirements. First wafer effects results in reduced yields and throughput and poor reliability of silicidation processes and ultimately increases the overall costs thereof.
It has been known that fluctuating chamber hardware conditions results in process inconsistencies which are undesirable for depositing films meeting process specifications and repeatability requirements. To overcome some of these fluctuations, many hardware manufactures advise qualifying the chamber hardware of a deposition tool by heating the chamber under vacuum for a period of time prior to its use in depositing materials on to a semiconductor substrate. Such a process is commonly called a bakeout, where heating under vacuum accelerates the removal of contaminants from the chamber, including driving out water vapor and other gases from the chamber components. However, inconsistencies between substrates having a deposited nickel film are still problematic despite qualifying a chamber prior to its use.
Hence, a continuing need exists for depositing nickel and its alloys repeatably and consistently on substrates in the formation of a low resistivity nickel containing film including the first several substrates. There is also a continuing need for depositing nickel containing films to enable the formation of a low resistivity nickel silicide layer on silicon surfaces of a semiconductor device with high repeatability, reliability and throughput.
An advantage of the present invention is a reliable and consistent nickel deposition process. Although the nickel deposition process of the present invention is not limited to semiconductor fabrication, it is contemplated that the formation of nickel containing films in accordance with the present invention can be used to manufacture nickel silicide composite structures, particulary composite structures of high-density integrated circuit (xe2x80x9cICxe2x80x9d) semiconductor devices, such as MOS and CMOS transistors formed in or on a semiconductor substrate.
Additional advantages and other features of the present invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from the practice of the present invention. The advantages of the present invention may be realized and obtained as particularly pointed out in the appended claims.
According to the present invention, the foregoing and other advantages are achieved in part by a method of depositing a nickel layer on a substrate surface. In one aspect of the invention, the surface is part of a device comprising a gate electrode and source/drain regions. The method comprises introducing a substrate having a surface to a deposition chamber, wherein the deposition chamber has at least one heating clement for heating the deposition chamber; and heating the deposition chamber with the heating element between substrate processing and/or heating while simultaneously depositing a layer of nickel on the substrate.
The present process advantageously minimizes fluctuations between semiconductor processing of nickel deposition. In an embodiment of the present invention, the heating elements can be one or more bakeout lamps that are typically provided with a deposition chamber. In practicing the invention, the bakeout lamps, or other equivalent heating element for heating the deposition chamber, are employed immediately prior to introducing the substrate to the deposition chamber. In another aspect of the present invention, the heating elements are used to heat the deposition chamber continuously, i.e. between the processing and during depositing of nickel films for two or more substrates.
Embodiments of the present invention include, heating the deposition chamber with the heating element after depositing the nickel layer on the substrate and continue heating the deposition chamber while introducing a second substrate to the deposition chamber. By continual heating of the deposition chamber, the present invention advantageously increases the number of useful substrates having a low reistivity nickel film.
Another aspect of the present invention is directed to a method of forming a nickel silicide on a semiconductor device. The method comprises forming a silicon gate electrode, having an upper surface and side surfaces, overlying a semiconductor substrate with a gate dielectric layer therebetween. It is further contemplated that the semiconductor substrate comprise source/drain regions in the semiconductor substrate, and a silicon nitride sidewall spacer disposed on the side surfaces. In accordance with the present invention, the semiconductor substrate is then introduced to a deposition chamber, wherein the deposition chamber has at least one heating element for heating the deposition chamber and heating the deposition chamber with the heating element between the processing of two or more semiconductor substrates and/or heating the chamber while simultaneously depositing a layer of nickel directly on the exposed silicon surfaces of the semiconductor substrate. Nickel silicide layers are then formed by heating the semiconductor substrate to cause the deposited nickel to react with underlying silicon surfaces to form a nickel silicide layer on the gate electrode and a nickel silicide layer on the source/drain regions. The unreacted nickel on non-reactive surfaces, e.g. insulator surfaces, are then removed, as by a wet etch, from the semiconductor substrate.
Embodiments of the present invention include heating the semiconductor substrate to form the nickel silicide layer on the gate electrode and source/drain regions at a temperature of approximately 300xc2x0 C. to approximately 700xc2x0 C. and for approximately 10 seconds to approximately 120 seconds and removing the unreacted nickel by immersing the semiconductor substrate in a solution of NH4OH, H2O2 and water (APM) or immersing the semiconductor substrate in a solution of H2SO4, H2O2 and water (SPM).
Additional advantages of the present invention will become readily apparent to those skilled in this art from the following detailed description, wherein only the preferred embodiment of the present invention is shown and described, simply by way of illustration of the best mode contemplated for carrying out the present invention. As will be realized, the present invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the present invention. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.